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501-1866



SPARCcenter 2000 motherboard XDBus 0M

 Twin XDBuses.  Up to two Mbus modules.  20MHz SBus.

 With component side up, external connector edge toward you, from left to
  right, the rear edge of the board has: nine LEDs (PA, PB, and bits 7-0 from
  left to right); a serial port connector (port A); a keyboard/mouse connector;
  and a serial port connector (port B).

 Memory is in the form of up to sixteen 8M (501-1817) or 32M (501-2196) 70ns
  SIMMs, in interleaved groups of eight, with half of each group attached to
  each XDBus. The minimum memory configuration is eight SIMMs in group 0.

  Back of machine (nearest SBus connectors)

       -------U4800------ 0  XDBus: 1
       -------U4400------ 1         1
       -------U5000------ 0         1
       -------U4600------ 1         1
       -------U4900------ 0         1
       -------U4500------ 1         1
       -------U5100------ 0         1
       -------U4700------ 1         1
       -------U4000------ 0         0
       -------U3600------ 1         0
       -------U4200------ 0         0
       -------U3800------ 1         0
       -------U4100------ 0         0
       -------U3700------ 1         0
       -------U4300------ 0         0
       -------U3900------ 1         0

  Front of machine (nearest XDBus connector)

 There are three jumpers.

 J1400 (3-pin jumper in near left, pin 1 nearest)
  1-2    RS-423
  2-3    RS-232 (+12V)

 J1401 (3-pin jumper in near left, pin 1 nearest)
  1-2    RS-423
  2-3    RS-232 (-12V)

 J1501 (3-pin jumper in center near edge, pin 1 to right)
  2-3    JUMPED always.

 Additional features of interest: the boot PROM is four chips along the near
  left edge, at locations U1206, U1204, U1201, and U1200 (farthest to nearest).
  The NVRAM chip is to the right of the boot PROM, at location U1205.  The
  keyboard fuse (a PTC device) is by the keyboard/mouse connector at F1500.

 Note that guide pins were added to the SPARCcenter 2000 backplane starting in
  November 1993.  Remove the screws on the inside ends of the motherboard XDBus
  connectors before installing it in a backplane with guide pins.

 Note that the highest-revision boot PROM should be installed in system board 0.

 Note that the 501-1866 can only access 1M of cache; the 501-2334 and 501-2362
  do not have this limitation.

 Note that FAB 270-1866-03 uses fuses at F0200 and F0300; FAB 270-1866-04 uses
  PTCs.

 Note that the SPARCcenter 1000 was first supported by Solaris 2.2 (SunOS 5.2).
  Solaris 2.2 supports up to five system boards, or eight Mbus modules on four
  system boards. Solaris 2.3 supports up to twenty Mbus modules on ten system
  boards.

  




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