Archive-name: sun2-hdwr-ref/part2 Posting-Frequency: as revised Version: $Id: $ THE SUN-2 HARDWARE REFERENCE compiled by James W. Birdsall (jwbirdsa@picarefy.com) HARDWARE ======== Boards ------ CPUs ---- Introduction ------------ In a Sun-1 or Sun-2, the actual microprocessor and associated support circuitry resided on a Multibus or VME board (which I have termed a 'CPU'). The bus slots were on a separate circuit board, the backplane, and the CPU plugged into the backplane just like any other board (barring some special requirements about which slot it went in). FAQ --- Overview by Model ----------------- Not much is known about Sun-1 CPUs. There were only three Sun-2 CPUs, the "Sun-2 Multibus", the "Sun-2 Multibus Prime", and the "2050", which was the only VME-based Sun-2 CPU. The "Sun-2 Multibus" CPU, 501-1007, was the earliest. It was used to upgrade Sun-1's, producing the 2/100U and 2/150U models, and was also used in the 2/120 and 2/170. The "Sun-2 Multibus Prime" CPU, 501-1051, was an update of the "Sun-2 Multibus" CPU. It was officially used only in the 2/120 and 2/170. The "2050" CPU, Sun's very first VME-based CPU, and the first with memory on the CPU board, came in a variety of flavors. The rear panel can either be single-width, for use in a normal VME chassis (2/130, 2/160), or double-width, for use in the 2/50 pizza box. Both kinds came with 1M, 2M, 3M, or 4M of onboard memory. Listing by Part Number ---------------------- Legend ------ Each board has a title, which gives the part number and model of machine in which it was used. Some boards have additional information between the type and model, which may include the amount of memory, presence or absence of certain features, etc. The listing for each board is broken down into the following categories: PROCESSOR: the actual microprocessor, and speed in MHz MEMORY: details of onboard memory, if any EXTERNAL BUS: the type of bus on the backplane (Multibus or VME) POWER: power requirements, in amps @ volts DC LAYOUT: description of locations of connectors, ports, LEDs, jumpers, switches, and anything else of interest MEM LAYOUT: description of locations of memory or SIMM sockets and related jumpers, and instructions for adding memory if possible CONNECTORS: any connectors which are not visible on the outside of the machine, with pinouts PORTS: connectors which appear on the outside of the machine LEDS: description of diagnostic LEDs or other indicators JUMPERS: settings of jumpers. Single jumpers and independent pairs within blocks are labeled JUMPED (connected) or UNJUMPED (disconnected) to indicate the default (i.e. the factory setting). When one of a block of jumpers is labeled DEFAULT, that means that the settings are mutually exclusive and the labeled pair is jumped by default. OTHER FEATURES: anything which doesn't fall under another category COMPATIBILITY (BOARDS): compatibility notes about other boards COMPATIBILITY (ROM): compatibility notes about versions of boot ROMs COMPATIBILITY (SUNOS): compatibility notes about version of SunOS Boards are listed in order of part number. Many models had several different part numbers, with slight variations between them. In these cases, when the differences are small, only the lowest-part-number board has a complete entry, and entries for boards with higher part numbers only have the categories which differ. In general, if a category is so listed, that entry *completely* replaces the one for the lower-numbered board, and if it is not listed, then the information is *completely* identical between the two boards. The exceptions are categories LAYOUT, CONNECTORS, PORTS, and JUMPERS, where the new information replaces only the corresponding information in the lower-numbered board (for example, if two pins of one jumper have a different function, only those pins are listed for the higher-numbered board). Parts ----- 501-1007 "Sun-2 Multibus" CPU (2/100U,2/120,2/150U,2/170) PROCESSOR: 68010 @ 10MHz MEMORY: none EXTERNAL BUS: Multibus POWER: 6A @ +5V LAYOUT: The board is entirely concealed within the chassis. On one long edge, it has Multibus card-edge connectors (P1 is the large one and at the top, P2 the small one). On the other long edge, from top to bottom, it has: + header connector (J2) for the Sun-1 parallel keyboard and mouse + diagnostic LEDs (8) + 50-pin header connector (J1) for two serial ports The boot EPROMs are in the upper near corner at U406 (grid B10) and U407 (grid B11). The clock battery is in the upper far corner. The IDPROM is in the center by the 68010 at U411 (grid D8). Jumper J200 is a single jumper toward the lower edge, by the crystal at grid D1. Jumper J400 is a block in the upper near, by the EPROMs at B10-11, with pin 1 the nearest of the uppermost pair. Jumpers J700, J701, J702, and J703 (from bottom to top) are single jumpers in a group in the lower far corner, by the P2 Multibus connector. Jumper J801 is a single jumper along the near edge between connector J2 and the LEDs. MEM LAYOUT: none CONNECTORS: The two serial ports on J1 appear as /dev/ttya and /dev/ttyb under SunOS. The documented maximum output speed is 19200 bps. Both ports are compatible with both RS232C and RS423, using Zilog Z8530A dual UART chips. The pinout of J1 is: 3 TxD-A 14 DTR-A 33 DD-B 4 DB-A 15 DCD-A 34 CTS-B 5 RxD-A 22 DA-A 36 DSR-B 7 RTS-A 24 BSY-A 38 GND-B 8 DD-A 28 TxD-B 39 DTR-B 9 CTS-A 29 DB-B 40 DCD-B 11 DSR-A 30 RxD-B 47 DA-B 13 GND-A 32 RTS-B 49 BSY-B J2 is for a type-1 (parallel) keyboard and mouse. Jumper J801 controls power to the mouse. PORTS: The two serial ports on J1 are usually cabled to the rear panel of the machine and labelled as SIO-A and SIO-B. The stock cabling is wired DTE. LEDS: There are eight diagnostic LEDs. JUMPERS: J200 Crystal shunt JUMPED Removed for A.T.E. testing, installed for normal operation. J400 PROM size select 1-2 27128 (128K) boot PROMs DEFAULT 3-4 27256 (256K) boot PROMs Boot ROM version 1.1.2 comes in 256K EPROMs. J700 Bus priority on serial arbitration UNJUMPED Should be jumped for 2/100U configuration. May need to be jumped if the Ciprico Tapemaster tape controller is used. J701 Common Bus Request arbiter UNJUMPED If the CPU board is used in conjunction with a Multibus DMA board (such as a disk or tape controller) that does NOT support the Common Bus Request (CBRQ), the CPU board must be configured (by jumping J701) such that it gives up the Multibus after every Multibus cycle. This also causes three additional wait states for each Multibus access. When this jumper is unjumped, the CPU board retains bus mastership until a lower priority master requests it by asserting CBRQ. Following a CBRQ, the CPU board yields mastership for at least one cycle. Certain machine configurations (especially those with color) will be much slower if this jumper is jumped. Should be jumped for 2/100U configuration. May need to be jumped if the Ciprico Tapemaster tape controller is used. J702 Enables the CCLK on P1 JUMPED J703 Enables the BCLK on P1 JUMPED J801 +5V on J2 UNJUMPED Must be jumped to use a type-1 mouse (2/100U, 2/150U), which needs the power. OTHER FEATURES: This board has a "RasterOp" function, which the comparable 501-1051 does not. COMPATIBILITY (BOARDS): May have to jump J1600 on monochrome framebuffer 501-1052-01/02 when used with boot ROM N or below and SunOS 3.0 or later. COMPATIBILITY (ROM): Boot ROM version N or later is required to run SunOS 2.0 or later. Boot ROM version N or earlier may require jumping J1600 on monochrome framebuffer 501-1052-01/02 when used with SunOS 3.0 or later. The 2/100U and 2/150U require boot ROM version Q (P/N 501-1103/1104-02) for the Sun VT100-style keyboard. COMPATIBILITY (SUNOS): SunOS 2.0 or later requires boot ROM version N or later. SunOS 3.0 or later may require jumping J1600 on monochrome framebuffer 501-1052-01/02 if the boot ROM version is N or earlier. SunOS 4.0 or later requires jumping J701 unless the kernel has been patched. 501-1051 "Sun-2 Multibus Prime" CPU (2/120,2/170) PROCESSOR: 68010 @ 10MHz MEMORY: none EXTERNAL BUS: Multibus POWER: 6A @ +5V, 0.1A at either -5V or -12V LAYOUT: The board is entirely concealed within the chassis. On one long edge, it has Multibus card-edge connectors (P1 is the large one and at the top, P2 the small one). On the other long edge, from top to bottom, it has: + header connector (J2) for the Sun-1 parallel keyboard and mouse + diagnostic LEDs (8) + 50-pin header connector (J1) for two serial ports The boot EPROMs are in the center below the 68010 at U406 (grid B6) and U407 (grid C6). The IDPROM is in the center above the 68010 at U411 (grid C11). Jumper J100 is a block along the far edge, with pin 1 the lower of the nearest pair. Jumper J102 is a block in the near middle, with pin 1 the nearest of the uppermost pair. Jumper J200 is a single jumper in the near lower corner by connector J1. Jumper J400 is a block in the center, with pin 1 the farthest of the lowermost pair. Jumper J700 is a block in the lower far corner, with pin 1 the farthest of the lowermost pair. Jumper J701 is a block below J100, with pin 1 the farthest of the lowermost pair. Jumper J801 is a single jumper along the near edge between connector J2 and the LEDs. MEM LAYOUT: none CONNECTORS: The two serial ports on J1 appear as /dev/ttya and /dev/ttyb under SunOS. The documented maximum output speed is 19200 bps. Both ports are compatible with both RS232C and RS423, using Zilog Z8530A dual UART chips. The pinout of J1 is: 3 TxD-A 14 DTR-A 33 DD-B 4 DB-A 15 DCD-A 34 CTS-B 5 RxD-A 22 DA-A 36 DSR-B 7 RTS-A 24 BSY-A 38 GND-B 8 DD-A 28 TxD-B 39 DTR-B 9 CTS-A 29 DB-B 40 DCD-B 11 DSR-A 30 RxD-B 47 DA-B 13 GND-A 32 RTS-B 49 BSY-B J2 is for a type-1 (parallel) keyboard/mouse. PORTS: The two serial ports on J1 are usually cabled to the rear panel of the machine and labelled as SIO-A and SIO-B. The stock cabling is wired DTE. LEDS: There are eight diagnostic LEDs. JUMPERS: J100 UNJUMPED Sixteen pins, hardwired. All unjumped by default. 1-2 Multibus IRQ 0 3-4 Multibus IRQ 1 5-6 Multibus IRQ 2 7-8 Multibus IRQ 3 9-10 Multibus IRQ 4 11-12 Multibus IRQ 5 13-14 Multibus IRQ 6 15-16 Multibus IRQ 7 J102 1-2 Connects -5V to P1 -5V DEFAULT Hardwired? 3-4 Connects -5V to regulator J200 Crystal shunt JUMPED Removed for A.T.E. testing, installed for normal operation. J400 PROM size select 1-2 27128 (128K) boot PROMs DEFAULT 3-4 27256 (256K) boot PROMs Boot ROM version 1.1.2 comes in 256K EPROMs. J700 1-2 CPU drives P1 reset DEFAULT 3-4 P1 INT drives CPU reset 5-6 serial arbiter enable UNJUMPED 7-8 arbiter bus config select UNJUMPED If the CPU board is used in conjunction with a Multibus DMA board (such as a disk or tape controller) that does NOT support the Common Bus Request (CBRQ), the CPU board must be configured such that it gives up the Multibus after every Multibus cycle (by jumping this pair). This also causes three additional wait states for each Multibus access. When this jumper is unjumped, the CPU board retains bus mastership until a lower priority master requests it by asserting CBRQ. Following a CBRQ, the CPU board yields mastership for at least one cycle. Certain machine configurations (especially those with color) will be much slower if this jumper is jumped. J701 1-2 CPU drives P1 BCLK JUMPED 3-4 CPU drives P1 CCLK JUMPED J801 not used UNJUMPED OTHER FEATURES: This board does not have a "RasterOp" function, which the comparable 501-1007 does. COMPATIBILITY (BOARDS): May have to jump J1600 on monochrome framebuffer 501-1052-01/02 when used with boot ROM N or below and SunOS 3.0 or later. COMPATIBILITY (ROM): Boot ROM version N or earlier may require jumping J1600 on monochrome framebuffer 501-1052-01/02 when used with SunOS 3.0 or later. COMPATIBILITY (SUNOS): SunOS 3.0 or later may require jumping J1600 on monochrome framebuffer 501-1052-01/02 if the boot ROM version is N or earlier. 501-1141 2050 CPU 1M (2/50) PROCESSOR: 68010 @ 10MHz MEMORY: 1M EXTERNAL BUS: VME POWER: 12A @ +5V, 1A @ +12V, 0.5A @ -12V LAYOUT: One edge of the board has the three VME connectors. From left to right with component side up and external connector edge toward you, the external connectors are: eight LEDs; a female DA15 keyboard/mouse connector; two female DB25 serial ports (ports A and B from left to right (top/bottom)); a female DA15 AUI Ethernet connector; and a female DE9 monochrome video connector. The boot PROMs are along the near left edge at grid A12 and A15. The IDPROM is just beyond the boot PROMs at grid A19. The missing (?) chips at grid A/B3-7 (9518) and E6 (P16R4) were for hardware-assisted DES encryption. Jumper J200 is a block in the near middle at grid F9, with pin 1 in the leftmost pair. Jumper J500 is a block in the middle left edge at grid A16-17, with pin 1 in the farthest pair. Jumper J702 is a single jumper in the near right at grid I-J5, closer to I. Jumper J704 is a single jumper in the near right at grid I-J5, closer to J. Jumper J800 is a block in the far left at grid D37, with pin1 in the leftmost pair. Jumper J900 is a block in the far left at grid C37, with pin 1 in the leftmost pair. Jumper J1201 is a block in the far left at grid D29, with pin 1 in the leftmost pair. Jumper J1600 is a block in the leftish middle at grid E17, with pin 1 in the leftmost pair. Jumper J1801 is a single jumper in the near right corner at grid L-M6. MEM LAYOUT: 1M built-in, consisting of 64Kx1 DIPs occupying positions 40-57 of rows N-U (note that the coordinate system changes in the memory area, in the far right corner of the board). There is one bit of parity per byte. See pins 13-14 of jumper J200, and jumper J1201. Framebuffer memory. CONNECTORS: none PORTS: keyboard/mouse serial ports: Pins 1-2 of jumper J200 control the serial port clock. AUI Ethernet: Jumper J702 controls +5V on pin 7. Jumper J704 sets the transceiver type. monochrome video: the onboard framebuffer appears as bwtwo0 to SunOS. The video output levels are ECL/TTL. The output may have a variety of resolutions, but is by default 1152 x 900 at 61.8KHz horizontal sync and 66Hz vertical sync. Jumper J1801 controls the video clock. LEDS: There are eight diagnostic LEDs. JUMPERS: J200 1-2 UART clock JUMPED 3-4 10/12MHz CPU operation JUMPED 5-6 12/10MHz CPU operation UNJUMPED 7-8 reserved UNJUMPED 9-10 reserved UNJUMPED 11-12 Ethernet clock JUMPED 13-14 memory refresh JUMPED 15-16 time outs JUMPED J500 Boot PROM size 1-2 27128 (128K) boot PROMs DEFAULT 3-4 27256 (256K) or 27512 (512K) boot PROMs 5-6 27128 (128K) or 27256 (256K) boot PROMs DEFAULT 7-8 27512 (512K) boot PROMs 27128 (128K) PROMs: 1-2, 5-6 jumped DEFAULT 27256 (256K) PROMs: 3-4, 5-6 jumped 27512 (512K) PROMs: 3-4, 7-8 jumped (version 1.1.2 PROMs) J702 +5V to Ethernet pin 7 UNJUMPED J704 Jump for type-1 Ethernet transceiver, umjump for type-2. J800 Jumpers marked "?" are listed as jumped by default in some sources and unjumped by default in others. They should probably be jumped. 1-2 VME interrupt level 1 JUMPED 3-4 VME interrupt level 2 JUMPED 5-6 VME interrupt level 3 ? 7-8 VME interrupt level 4 ? 9-10 VME interrupt level 5 ? 11-12 VME interrupt level 6 JUMPED 13-14 VME interrupt level 7 JUMPED 15-16 unused J900 1-2 DVMA addr comparator A20=0/1 JUMPED=1 3-4 DVMA addr comparator A21=0/1 JUMPED=1 5-6 DVMA addr comparator A22=0/1 JUMPED=1 7-8 DVMA addr comparator A23=0/1 JUMPED=1 9-10 VME arbiter JUMPED 11-12 VME reset master DEFAULT 13-14 VME reset slave 15-16 VME system clock JUMPED J1201 Memory size (shown for 1M) 1-2 UNJUMPED 3-4 UNJUMPED 5-6 JUMPED 7-8 UNJUMPED 9-10 JUMPED 11-12 UNJUMPED 13-14 JUMPED 15-16 UNJUMPED J1600 1-2 video register sense bit 0, unjumped JUMPED if display size is 1024 x 1024 3-4 video register sense bit 1 JUMPED 5-6 video register sense bit 2 JUMPED 7-8 video register sense bit 3 JUMPED 9-10 reserved UNJUMPED 11-12 reserved UNJUMPED 13-14 10/12MHz CPU operation JUMPED 15-16 12/10MHz CPU operation UNJUMPED J1801 Enable 100MHz video clock JUMPED OTHER FEATURES: This part number has a double-width back panel. COMPATIBILITY (BOARDS): -- COMPATIBILITY (ROM): -- COMPATIBILITY (SUNOS): -- 501-1142 2050 CPU 2M (2/50) See 501-1141, except: MEMORY: 2M MEM LAYOUT: 2M built-in, consisting of 256Kx1 DIPs occupying positions 40-57 of rows N-Q (note that the coordinate system changes in the memory area, in the far right corner of the board). There is one bit of parity per byte. See jumper J1201. Framebuffer memory. JUMPERS: J1201 Memory size (shown for 2M) 1-2 JUMPED 3-4 UNJUMPED 5-6 UNJUMPED 7-8 JUMPED 9-10 UNJUMPED 11-12 JUMPED 13-14 UNJUMPED 15-16 JUMPED 501-1143 2050 CPU 4M (2/50) See 501-1141, except: MEMORY: 4M MEM LAYOUT: 4M built-in, consisting of 256Kx1 DIPs occupying positions 40-57 of rows N-U (note that the coordinate system changes in the memory area, in the far right corner of the board). There is one bit of parity per byte. See jumper J1201. Framebuffer memory. JUMPERS: J1201 Memory size (shown for 4M) 1-2 JUMPED 3-4 JUMPED 5-6 UNJUMPED 7-8 JUMPED 9-10 UNJUMPED 11-12 JUMPED 13-14 UNJUMPED 15-16 JUMPED 501-1144 2050 CPU 1M (2/130,2/160) See 501-1141, except: JUMPERS: J1600 3-4 video register sense bit 1, unjumped JUMPED if a color display board is installed OTHER FEATURES: This part number has a single-width back panel. 501-1145 2050 CPU 2M (2/130,2/160) See 501-1142, except: JUMPERS: J1600 3-4 video register sense bit 1, unjumped JUMPED if a color display board is installed OTHER FEATURES: This part number has a single-width back panel. 501-1146 2050 CPU 4M (2/130,2/160) See 501-1143, except: JUMPERS: J1600 3-4 video register sense bit 1, unjumped JUMPED if a color display board is installed OTHER FEATURES: This part number has a single-width back panel. 501-1426 2050 CPU 1M (2/50) See 501-1141, except: OTHER FEATURES: 1.1.2 boot ROMs stock. 501-1427 2050 CPU 2M (2/50) See 501-1142, except: OTHER FEATURES: 1.1.2 boot ROMs stock. 501-1428 2050 CPU 3M (2/50) See 501-1142, except: MEM LAYOUT: 3M built-in, consisting of 256Kx1 DIPs occupying positions 40-57 of rows N-S (note that the coordinate system changes in the memory area, in the far right corner of the board). There is one bit of parity per byte. See jumper J1201. Framebuffer memory. OTHER FEATURES: 1.1.2 boot ROMs stock. 501-1429 2050 CPU 1M (2/130,2/160) See 501-1144, except: OTHER FEATURES: 1.1.2 boot ROMs stock. 501-1430 2050 CPU 2M (2/130,2/160) See 501-1145, except: OTHER FEATURES: 1.1.2 boot ROMs stock. 501-1437 2050 CPU 3M (2/130,2/160) See 501-1145, except: MEM LAYOUT: 3M built-in, consisting of 256Kx1 DIPs occupying positions 40-57 of rows N-S (note that the coordinate system changes in the memory area, in the far right corner of the board). There is one bit of parity per byte. See jumper J1201. Framebuffer memory. OTHER FEATURES: 1.1.2 boot ROMs stock.